Semiconductor packages are used in many areas of application. Known semiconductor packages have a connection frame and a chip which is fitted to the connection frame. An encapsulation material encapsulates the chip and at least portions of the connection frame. In most known semiconductor packages, the encapsulation material encapsulates the entire connection frame of the semiconductor package except for outwardly directed electrical connectors.
The chip has a casing, also referred to as a housing or package, which includes chip connectors, for example, leads, pins, or balls. For such casings, there have been efforts at standardization, for example, by the JEDEC (previously Joint Electron Device Engineering Council, currently JEDEC Solid State Technology Association). A distinction is often made between wired “through-hole mountable” structural forms (Through Hole Technology—THT) and “surface-mountable” (Surface Mounted Technology—SMT) structural forms. The casing is used to fix the chip to a printed circuit board and the chip is connected to an intermediate material (also referred to as the connection frame or “leadframe”). Electrical connectors, for example wires, lead from the chip connectors to package connectors of the package. The package connectors may be leads, pins or balls.
Electrical structural members have a plurality of semiconductor packages. Known electrical structural members are constructed in a substantially cuboid manner and have a height smaller than the width; the width is often significantly smaller than the length and the height is often significantly smaller than the width. In such electrical structural members, it is problematic to connect the electrical structural members to a printed circuit board in an upright state in which one of the short sides abuts the printed circuit board.